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Electric 8.05.1
Electric is a complete EDA system that can handle many forms of circuit design. more>>
* Custom IC layout
* Schematic Capture (digital and analog)
* Textual Languages such as VHDL and Verilog
* Programmable logic (FPGAs)
* ...and much more.
SPUC 2.3.1
Signal Processing using C++ (SPUC) is a C++ source code library. more>>
The objective of SPUC is to provide the Communications Systems Designer or DSP Algorithm designer with simple, efficient and reusable DSP building block objects. Thus allowing a transition from System design to implementation in either programmable DSP chips or hardwired DSP logic.
While Matlab is perhaps the most useful available tool for this purpose, it can be quite slow for simulation and it favors a matrix/block based approach rather than the sample by sample simulations that are often most useful for communications systems design.
Also Matlab is generally awkward or inefficient when dealing with several interactive feedback loops where C/C++ is perhaps the most useful environment. For bit-accurate simulations (for VLSI design) C/C++ generally outperforms and is easier to manipulate than Matlab or other GUI-based tools.
This Class Library
1) basic building blocks such as complex data types, Fixed-bit width integer classes, pure-delay blocks, etc.
2) Basic DSP building blocks such as FIR, IIR, Allpass, Running Average, Lagrange interpolation filters, NCO, Cordic rotator.
3) Several communications functions such as timing, phase and frequency discriminators for BPSK/QPSK signals.
4) Other miscellaneous DSP/Communications related functions/classes.
5) Ability to design several types of FIR and IIR filters
6) Various adaptive equalizer classes
7) This library now includes code from IT 3.7.0. Code was modified to work together with SPUC and replace Vector and Matrix classes from TNT.
8) Capitalized and uppercase class names are classes not originally in SPUC
The classes are designed so that they can be used in a simple straight forward manner. For example, a FIR would be initialized with its tap weights and then simply a member function would be called every time a sample is input or an output is required.
Enhancements:
- There have been several changes since 2.0.1 that are documented in the Sourceforge release pages.
- PDF documentation is also available now.
Alliance CAD System 5.0.20070718
Alliance CAD System are EDA tools for VLSI design. more>>
A complete set of portable CMOS libraries is provided. Alliance is the result of a twelve year effort spent at ASIM department of LIP6 laboratory of the Pierre et Marie Curie University (Paris VI, France).
Alliance has been used for research projects such as the 875 000 transistors StaCS superscalar microprocessor and 400 000 transistors IEEE Gigabit HSL Router.
Alliance provides CAD tools covering most of all the digital design flow:
- VHDL Compilation and Simulation
- Model checking and formal proof
- RTL and Logic synthesis
- Data-Path compilation
- Macro-cells generation
- Place and route
- Layout edition
- Netlist extraction and verification
- Design rules checking
Archimedes 0.0.4
GNU Archimedes is the GNU package for the design and simulation of submicron semiconductor devices. more>>
The physics and geometry of a general device is introduced by typing a simple script, which makes, in this sense, GNU Archimedes a powerfull tool for the simulation of quite general semiconductor devices.
In the present release, GNU Archimedes is able to simulate electrons and heavy holes in Silicon and GaAs (Gamma and L-valleys) devices (holes are simulated by means of a simplified MEP model), and in the next release, which is in preparation, it will be able to make simulations in 1D, 2D and 3D (this release will be delivered as soon as possible).
The Scientifical and Industrial Motivations
In today semiconductor technology, the miniaturization of devices is more and more progressing. In this context, it is easy to see that numerical simulations play an important role at every level of device manufacture. In fact, the cost of designing and physically constructing prototypes for VLSI semiconductor devices is very high and without the availability of advanced simulators the efforts for devices miniaturization would, likely, be brought to a halt. From assessing the performance of individual transistors, to circuits and systems, and, consequently, with the promise of improved device performance, industries are encouraged to keep on miniaturizing with lower manufacture costs.
But, unfortunately, such simulations are not whithout their challenges... A first consequence of device miniaturization is that simulations of submicron semicondutor devices requires advanced transport models. Because of the presence of very high and rapidly varying electric field, phenomena occur which cannot be described by means of the well-known drift-diffusion models, which do not incorporate energy as a dynamical variable.
That is why some generalization has been sought in order to obtain more physically accurate models, like energy-transport and hydrodynamical models. The energy-transport models which are implemented in commercial simulators are based on phenomenological constitutive equations for the particle flux and energy flux depending on a set of parameters which are fitted to homogeneous bulk material Monte Carlo simulations. So, this is not, certainly, a satisfactory physical description of the internal electronic dynamics in a semiconductor device.
As current device technologies quickly approach the scales whereby quantum effects due to strong confinement of carriers and direct source-drain tunneling will begin to dominate, new simulation techniques are required in order to fully understand and acurately simulate the physics behind the technology operation.
Of all the simulation methods currently employed, ensemble Monte Carlo has always been, both in the accademic and industrial community, the most vigorous and trusted method for device simulation, as it is proven to be reliable and predictive, as one can easily see from the vast bibliography on this subject.
However, as Monte Carlo relies on the particle nature of the electron (in fact we consider an electron like a biliard ball), quantum effects associated with the wave-like nature of electrons cannot fully incorporated into the actual simulators, i.e. the ensemble Monte Carlo have to be lightly (or strongly, it depends on the point of view and on the methods implemented...) modified to take into account the quantum effects, at least at a first order of approximation, which is certainly enough to take into account correctly all the relevant quantum effects present in the present-day semiconductor devices (till 2015 probably...). In order to take into account the wave-like nature of electrons we use a recently introduced quantum theory, the so-called Bohm effective potential theory.
So it is challenging and very interesting to develop such a code for 2D quantum submicron semiconductor devices. This is why I have decided to implement this code, but these are not the only motivations...
The Ethical Motivations
The very sad situation you quickly observe working in a semiconductor industry, but also in all places in which researches about semiconductor devices are made, the only codes for simulation you can find are not free and are proprietary codes.
That is a very bad situation because, at the present time, if you need to develop your own code for the purpose of simulating a device it is IMPOSSIBLE to obtain an advanced one in a short time, and, trust me, this is EXTREMELY BAD for scientific research... (Immagine if you had to re-discover the Newtonian laws every time you need them...) So, you can find a huge amount of papers describing a lot of numerical methods for simulating, in a very advanced way, semiconductor devices (even in the quantum case), but nobody will give you a code on which you can construct your own method (with the unlikely exception that at least one of the programmers is a friend of yours :) ).
Even worst, if you are a semiconductor device designer and you want to simulate "realistically" a new device, you have to pay (trust me, at very high costs!) a BINARY (just a binary and not the code!) from some well-known software industry. This binary will certainly have some bugs (because it is coded by humans which are not perfect...) and you will never have the possibility of fix them on your own. Of course, you can write to the software house and tell them that there is a bug, but, how many time do you will wait for a new release without those bugs? I dont think it will be a short time...
My impression is that, after a long research on the Web for a Free Software dealing with advanced 2D semiconductor device simulation, there was not a free code for the purpose of semiconductor devices simulation (i mean under GPL license). To be sure about it, I asked to the great Richard Stallman (by mail) if it will be worth to do a code like this and he encouraged me to code it, because there wasnt a code like this as free. So I decided to write this code..
JGraph 5.9.2.0
JGraph is the leading Open Source Java Graph Visualization Library. It follows Swing design patterns to provide an API familiar to Swing programmers and functionality that provides a range of features. Graph visualization is a central requirement for applications such as workflow editors, computer and telecommunication networks display, flowcharts, VLSI and CAD, business process modeling, organizational charts, entity-relationship diagrams... more>>
JGraph - JGraph is the leading Open Source Java Graph Visualization Library. It follows Swing design patterns to provide an API familiar to Swing programmers and functionality that provides a range of features. Graph visualization is a central requirement for applications such as workflow editors, computer and telecommunication networks display, flowcharts, VLSI and CAD, business process modeling, organizational charts, entity-relationship and cause and effect diagrams, and much more.
The core JGraph library provides all the features required in a graph visualization library. Built on top of the core are JGraph Layout Pro and JGraphpad Pro. JGraph Layout Pro provides graph layouts that automatically position your nodes. There is a hierarchical layout for workflows, tree layouts for organization charts and so on. JGraphpad Pro is a complete application framework that enables you to rapidly prototype your application, dramatically reducing your time to market for your product.
Enhancements:
Version 5.9.2.0
General bug fixing
System Requirements:<<less
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